Semiconductor Planar Process and Integrated Circuit, 1959

Semiconductor Planar Process and Integrated Circuit, 1959 (HM10JE)

Location: Palo Alto, CA 94303 Santa Clara County
Country: United States of America

N 37° 25.309', W 122° 6.2'

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IEEE Milestone in Electrical Engineering and Computing

The 1959 invention of the Planar Process by Jean A. Hoerni and the Integrated Circuit (IC) based on planar technology by Robert N. Noyce catapulted the semiconductor industry into the silicon IC era. This pair of pioneering inventions lead to the present IC industry which today supplies a wide and growing variety of advanced semiconductor products used throughout the world.
HM NumberHM10JE
Year Placed2009
Placed ByInstitute of Electrical and Electronics Engineers
Marker ConditionNo reports yet
Date Added Tuesday, September 16th, 2014 at 1:40am PDT -07:00
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Locationbig map
UTM (WGS84 Datum)10S E 579339 N 4142044
Decimal Degrees37.42181667, -122.10333333
Degrees and Decimal MinutesN 37° 25.309', W 122° 6.2'
Degrees, Minutes and Seconds37° 25' 18.54" N, 122° 6' 12.00" W
Driving DirectionsGoogle Maps
Area Code(s)650, 408
Closest Postal AddressAt or near 844 E Charleston Rd, Palo Alto CA 94303, US
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